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Design of novel QCA-based half/full subtractors
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Quantum-dot cellular automata (QCA) is an emerging nanotechnology and a possible alternative to the related issues of traditional complementary metal oxide semiconductors. It offers advantages such as high device density, high operating speed and ultra-low power consumption compared with semiconductor transistor-based technologies. Adder and subtractor circuits are the fundamental arithmetic logic circuits used in digital systems. The performance of digital systems can directly affect the operation of adder and subtractor circuits. In this direction, several QCA digital approaches have been devised to increase the performance of adder and subtractor circuits. In this paper, novel half/full subtractors using a single-layer scheme of QCA cells are proposed. The proposed structures have the most beneficial features of low power consumption, reduced area, less latency (clock delays) and circuit complexity (number of cells) compared to conventional designs. In addition, a novel controlled half adder/subtractor is presented. The modular layouts are verified with the freely available QCADesigner tool version 2.0.3. The results of computer simulations carried out on the proposed designs have confirmed the suitability of the proposed techniques.
Title: Design of novel QCA-based half/full subtractors
Description:
Quantum-dot cellular automata (QCA) is an emerging nanotechnology and a possible alternative to the related issues of traditional complementary metal oxide semiconductors.
It offers advantages such as high device density, high operating speed and ultra-low power consumption compared with semiconductor transistor-based technologies.
Adder and subtractor circuits are the fundamental arithmetic logic circuits used in digital systems.
The performance of digital systems can directly affect the operation of adder and subtractor circuits.
In this direction, several QCA digital approaches have been devised to increase the performance of adder and subtractor circuits.
In this paper, novel half/full subtractors using a single-layer scheme of QCA cells are proposed.
The proposed structures have the most beneficial features of low power consumption, reduced area, less latency (clock delays) and circuit complexity (number of cells) compared to conventional designs.
In addition, a novel controlled half adder/subtractor is presented.
The modular layouts are verified with the freely available QCADesigner tool version 2.
3.
The results of computer simulations carried out on the proposed designs have confirmed the suitability of the proposed techniques.
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