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Novel Quantum-Dot Cellular Automata-Based Gate Designs for Efficient Reversible Computing
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Reversible logic enables ultra-low power circuit design and quantum computation. Quantum-dot Cellular Automata (QCA) is the most promising technology considered to implement reversible circuits, mainly due to the correspondence between features of reversible and QCA circuits. This work aims to push forward the state-of-the-art of the QCA-based reversible circuits implementation by proposing a novel QCA design of a reversible full adder\full subtractor (FA\FS). At first, we consider an efficient XOR-gate, and based on this, new QCA circuit layouts of Feynman, Toffoli, Peres, PQR, TR, RUG, URG, RQCA, and RQG are proposed. The efficient XOR gate significantly reduces the required clock phases and circuit area. As a result, all the proposed reversible circuits are efficient regarding cell count, delay, and circuit area. Finally, based on the presented reversible gates, a novel QCA design of a reversible full adder\full subtractor (FA\FS) is proposed. Compared to the state-of-the-art circuits, the proposed QCA design of FA\FS reversible circuit achieved up to 57% area savings, with 46% and 29% reduction in cell number and delay, respectively.
Title: Novel Quantum-Dot Cellular Automata-Based Gate Designs for Efficient Reversible Computing
Description:
Reversible logic enables ultra-low power circuit design and quantum computation.
Quantum-dot Cellular Automata (QCA) is the most promising technology considered to implement reversible circuits, mainly due to the correspondence between features of reversible and QCA circuits.
This work aims to push forward the state-of-the-art of the QCA-based reversible circuits implementation by proposing a novel QCA design of a reversible full adder\full subtractor (FA\FS).
At first, we consider an efficient XOR-gate, and based on this, new QCA circuit layouts of Feynman, Toffoli, Peres, PQR, TR, RUG, URG, RQCA, and RQG are proposed.
The efficient XOR gate significantly reduces the required clock phases and circuit area.
As a result, all the proposed reversible circuits are efficient regarding cell count, delay, and circuit area.
Finally, based on the presented reversible gates, a novel QCA design of a reversible full adder\full subtractor (FA\FS) is proposed.
Compared to the state-of-the-art circuits, the proposed QCA design of FA\FS reversible circuit achieved up to 57% area savings, with 46% and 29% reduction in cell number and delay, respectively.
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