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P‐2: Investigation of high mobility crystalline IGO TFT with top‐gate structure for LCD display application
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The present paper reports the study of electrical characteristics and bias temperature stress (BT) stability of crystalline Indium‐Gallium oxide (IGO) dual‐gate thin film transistor (TFT) with top‐gate structure. TFT with normalized Ion over 100εA and PBTS/NBTIS of 0.35/‐2.85V was successfully fabricated. By adjusting oxygen partial pressure (O2%) and substrate temperature, we can control the wet etching rate (WER) of as‐deposited IGO film. After post annealing, crystalline IGO containing In2O3 phase with preferred orientation of (222) has been formed. The TFT characteristics uniformity and BT stability were found to depend on parameters of gate insulator (GI) deposition and pre‐treatment before GI. Based on experimental results, we propose high GI deposition temperature associated with low N2O plasma treatment power as the optimal condition for industrial production of crystalline IGO TFT.
Title: P‐2: Investigation of high mobility crystalline IGO TFT with top‐gate structure for LCD display application
Description:
The present paper reports the study of electrical characteristics and bias temperature stress (BT) stability of crystalline Indium‐Gallium oxide (IGO) dual‐gate thin film transistor (TFT) with top‐gate structure.
TFT with normalized Ion over 100εA and PBTS/NBTIS of 0.
35/‐2.
85V was successfully fabricated.
By adjusting oxygen partial pressure (O2%) and substrate temperature, we can control the wet etching rate (WER) of as‐deposited IGO film.
After post annealing, crystalline IGO containing In2O3 phase with preferred orientation of (222) has been formed.
The TFT characteristics uniformity and BT stability were found to depend on parameters of gate insulator (GI) deposition and pre‐treatment before GI.
Based on experimental results, we propose high GI deposition temperature associated with low N2O plasma treatment power as the optimal condition for industrial production of crystalline IGO TFT.
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