Low-power artificial neuron networks with enhanced synaptic functionality using dual transistor and dual memristor

Artificial neurons with bio-inspired firing patterns have the potential to significantly improve the performance of neural network computing. The most significant component of an artificial neuron circuit is a large amount of energy consumption. Recent literature has proposed memristors as a promising option for synaptic implementation. In contrast, implementing memristive circuitry through neuron hardware presents significant challenges and is a relevant research topic. This paper describes an efficient circuit-level mixed CMOS memristor artificial neuron network with a memristor synapse model. From this perspective, the paper describes the design of artificial neurons in standard CMOS technology with low power utilization. The neuron circuit response is a modified version of the Morris-Lecar theoretical model. The suggested circuit employs memristor-based artificial neurons with Dual Transistor and Dual Memristor (DTDM) synapse circuit. The proposed neuron network produces a high spiking frequency and low power consumption. According to our research, a memristor-based Morris Lecar (ML) neuron with a DTDM synapse circuit consumes 12.55 pW of power, the spiking frequency is 22.72 kHz, and 2.13 fJ of energy per spike. The simulations were carried out using the Spectre tool with 45 nm CMOS technology.