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Simulation of load‐current‐controlled gaas logic circuits
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AbstractSince the mobility of the hole is low in GaAs, P‐channel MESFET is of low speed. This makes it difficult to utilize the feature of the complementary logic circuit. Consequently, a direct‐coupled logic circuit is usually constructed using N‐channel MESFET. On the other hand, using the load‐current‐controlled logic circuit proposed in this paper, the speed and the power consumption can be improved compared with the directcoupled logic circuit. In other words, by limiting the load current according to the input state, the current counteracting the transition of the logic state can be decreased drastically. This speeds up the logic transition, thereby increasing the logic swing and reducing the power consumption.In this paper, the whole‐region model of the field‐effect transistor is introduced, and the logic swing of the GaAs ring‐oscillator is determined using Poincaré's mapping. Then the transient response of the load‐current‐controlled logic circuit is determined by simulation, leading to high speed and low power consumption.
Title: Simulation of load‐current‐controlled gaas logic circuits
Description:
AbstractSince the mobility of the hole is low in GaAs, P‐channel MESFET is of low speed.
This makes it difficult to utilize the feature of the complementary logic circuit.
Consequently, a direct‐coupled logic circuit is usually constructed using N‐channel MESFET.
On the other hand, using the load‐current‐controlled logic circuit proposed in this paper, the speed and the power consumption can be improved compared with the directcoupled logic circuit.
In other words, by limiting the load current according to the input state, the current counteracting the transition of the logic state can be decreased drastically.
This speeds up the logic transition, thereby increasing the logic swing and reducing the power consumption.
In this paper, the whole‐region model of the field‐effect transistor is introduced, and the logic swing of the GaAs ring‐oscillator is determined using Poincaré's mapping.
Then the transient response of the load‐current‐controlled logic circuit is determined by simulation, leading to high speed and low power consumption.
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