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Realization of a Generalized Switched-Capacitor Multilevel Inverter Topology with Less Switch Requirement
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Conventional multilevel inverter topologies like neutral point clamped (NPC), flying capacitor (FC), and cascade H bridge (CHB) are employed in the industry but require a large number of switches and passive and active components for the generation of a higher number of voltage levels. Consequently, the cost and complexity of the inverter increases. In this work, the basic unit of a switched capacitor topology was generalized utilizing a cascaded H-bridge structure for realizing a switched-capacitor multilevel inverter (SCMLI). The proposed generalized MLI can generate a significant number of output voltage levels with a lower number of components. The operation of symmetric and asymmetric configurations was shown with 13 and 31 level output voltage generation, respectively. Self-capacitor voltage balancing and boosting capability are the key features of the proposed SCMLI structure. The nearest level control modulation scheme was employed for controlling and regulating the output voltage. Based on the longest discharging time, the optimum value of capacitance was also calculated. A generalized formula for the generation of higher voltage levels was also derived. The proposed model was simulated in the MATLAB®/Simulink 2016a environment. Simulation results were validated with the hardware implementation.
Title: Realization of a Generalized Switched-Capacitor Multilevel Inverter Topology with Less Switch Requirement
Description:
Conventional multilevel inverter topologies like neutral point clamped (NPC), flying capacitor (FC), and cascade H bridge (CHB) are employed in the industry but require a large number of switches and passive and active components for the generation of a higher number of voltage levels.
Consequently, the cost and complexity of the inverter increases.
In this work, the basic unit of a switched capacitor topology was generalized utilizing a cascaded H-bridge structure for realizing a switched-capacitor multilevel inverter (SCMLI).
The proposed generalized MLI can generate a significant number of output voltage levels with a lower number of components.
The operation of symmetric and asymmetric configurations was shown with 13 and 31 level output voltage generation, respectively.
Self-capacitor voltage balancing and boosting capability are the key features of the proposed SCMLI structure.
The nearest level control modulation scheme was employed for controlling and regulating the output voltage.
Based on the longest discharging time, the optimum value of capacitance was also calculated.
A generalized formula for the generation of higher voltage levels was also derived.
The proposed model was simulated in the MATLAB®/Simulink 2016a environment.
Simulation results were validated with the hardware implementation.
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