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A series peaked gm‐boosted 3.1–10.6 GHz CMOS CG UWB LNA for WiMedia
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AbstractAn improved low noise amplifier (LNA) architecture is presented for WiMedia ultrawideband radio frequency frontend.The LNA topology addresses the issue of noise reduction keeping the power consumption to a minimum by employing the transconductance “gm” boosted common gate (CG) LNA topology with series peaking, operating in the WiMedia spectrum. This CG LNA utilizes an active gm‐boosting stage where the bias current is shared between the gm‐boosting stage and the self‐biased CG amplifying stage. In conjunction with an LC T‐network to further reduce the noise figure (NF) of the CG stage with finite output conductance (gds), inductive series peaking is used to widen the operating pass‐band. The proposed LNA is designed using the 130 nm IBM CMOS process and achieved an input return loss (S11) and an output return loss (S22) of −10 dB and −14 dB, respectively. The LNA exhibits forward power gain (S21) of around 14 dB with a NF ranging between 3.5 and 4.1 dB. The complete chip dissipates 5 mW from a 1.0 V supply with an input referred third order intercept point (IIP3) and an input referred 1‐dB compression point (ICP1dB) of −4.8 dBm and −12.1 dBm, respectively. © 2011 Wiley Periodicals, Inc. Microwave Opt Technol Lett 54:532–535, 2012; View this article online at wileyonlinelibrary.com. DOI 10.1002/mop.26573
Title: A series peaked gm‐boosted 3.1–10.6 GHz CMOS CG UWB LNA for WiMedia
Description:
AbstractAn improved low noise amplifier (LNA) architecture is presented for WiMedia ultrawideband radio frequency frontend.
The LNA topology addresses the issue of noise reduction keeping the power consumption to a minimum by employing the transconductance “gm” boosted common gate (CG) LNA topology with series peaking, operating in the WiMedia spectrum.
This CG LNA utilizes an active gm‐boosting stage where the bias current is shared between the gm‐boosting stage and the self‐biased CG amplifying stage.
In conjunction with an LC T‐network to further reduce the noise figure (NF) of the CG stage with finite output conductance (gds), inductive series peaking is used to widen the operating pass‐band.
The proposed LNA is designed using the 130 nm IBM CMOS process and achieved an input return loss (S11) and an output return loss (S22) of −10 dB and −14 dB, respectively.
The LNA exhibits forward power gain (S21) of around 14 dB with a NF ranging between 3.
5 and 4.
1 dB.
The complete chip dissipates 5 mW from a 1.
0 V supply with an input referred third order intercept point (IIP3) and an input referred 1‐dB compression point (ICP1dB) of −4.
8 dBm and −12.
1 dBm, respectively.
© 2011 Wiley Periodicals, Inc.
Microwave Opt Technol Lett 54:532–535, 2012; View this article online at wileyonlinelibrary.
com.
DOI 10.
1002/mop.
26573.
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