Search engine for discovering works of Art, research articles, and books related to Art and Culture
Javascript must be enabled to continue!
An Energy and Area Efficient Carry Select Adder with Dual Carry Adder Cell
View through CrossRef
In this paper, an energy and area efficient carry select adder (CSLA) is proposed. To minimize the redundant logic operation of a regular CSLA, a dual carry adder cell is proposed. The proposed dual carry adder is composed of an XOR/XNOR cell and two pairs of sum-carry cells. Both CMOS logic and a transmission gate were applied to the dual carry adder cell to achieve fast and energy efficient operation. Eight-bit, 16b, and 32b square-root (SQRT) CSLAs based on the proposed dual carry adder were developed. The post-layout simulation based on a SMIC 55 nm process demonstrated that the proposed CSLAs reduced power consumption by 68.4–72.2% with a slight delay increase for different bit widths. As the dual carry adder had much fewer transistors than the two regular full adders, the area of the proposed CSLAs was reduced by 45.8–51.1%. The area-power-delay product of the proposed CSLA improved 5.1×–6.73× compared with the regular CSLA.
Title: An Energy and Area Efficient Carry Select Adder with Dual Carry Adder Cell
Description:
In this paper, an energy and area efficient carry select adder (CSLA) is proposed.
To minimize the redundant logic operation of a regular CSLA, a dual carry adder cell is proposed.
The proposed dual carry adder is composed of an XOR/XNOR cell and two pairs of sum-carry cells.
Both CMOS logic and a transmission gate were applied to the dual carry adder cell to achieve fast and energy efficient operation.
Eight-bit, 16b, and 32b square-root (SQRT) CSLAs based on the proposed dual carry adder were developed.
The post-layout simulation based on a SMIC 55 nm process demonstrated that the proposed CSLAs reduced power consumption by 68.
4–72.
2% with a slight delay increase for different bit widths.
As the dual carry adder had much fewer transistors than the two regular full adders, the area of the proposed CSLAs was reduced by 45.
8–51.
1%.
The area-power-delay product of the proposed CSLA improved 5.
1×–6.
73× compared with the regular CSLA.
Related Results
Complex Collision Tumors: A Systematic Review
Complex Collision Tumors: A Systematic Review
Abstract
Introduction: A collision tumor consists of two distinct neoplastic components located within the same organ, separated by stromal tissue, without histological intermixing...
High-Speed Area-Efficient VLSI Architecture of Three Operand Binary Adder
High-Speed Area-Efficient VLSI Architecture of Three Operand Binary Adder
This paper proposes a novel high-speed three-operand binary adder architecture, namely the Han-Carlson adder, which mitigates the inherent limitations of traditional Carry Save Add...
Frequency of Common Chromosomal Abnormalities in Patients with Idiopathic Acquired Aplastic Anemia
Frequency of Common Chromosomal Abnormalities in Patients with Idiopathic Acquired Aplastic Anemia
Objective: To determine the frequency of common chromosomal aberrations in local population idiopathic determine the frequency of common chromosomal aberrations in local population...
Four-bit Nanoadder Controlled by Five-Inputs Majority Elements
Four-bit Nanoadder Controlled by Five-Inputs Majority Elements
This paper presents a nano circuit of a full one-bit adder on the proposed five-input majority element. This innovative full adder design is used to development of a four-bit adder...
Performance Comparison of Adder Topologies with Parallel Processing Adder Circuit
Performance Comparison of Adder Topologies with Parallel Processing Adder Circuit
In today’s modern era IC architecture design adders are become obligatory block. The growth in digitalization scenario to produce compact design products parameters like power, del...
MARS-seq2.0: an experimental and analytical pipeline for indexed sorting combined with single-cell RNA sequencing v1
MARS-seq2.0: an experimental and analytical pipeline for indexed sorting combined with single-cell RNA sequencing v1
Human tissues comprise trillions of cells that populate a complex space of molecular phenotypes and functions and that vary in abundance by 4–9 orders of magnitude. Relying solely ...
Design and Implementation of Area Efficient 16-bit Carry Skip Adder
Design and Implementation of Area Efficient 16-bit Carry Skip Adder
Adders are fundamental unit in many computer systems. One of the most efficient adder architectures in terms of delay and area is the carry-skip adder. In this paper an area effici...
A Novel High Computing Power Efficient VLSI Architectures of Three Operand Binary Adders
A Novel High Computing Power Efficient VLSI Architectures of Three Operand Binary Adders
Directly or indirectly adders are the basic elements in almost all digital circuits, three operand adders are the basic building blocks in LCG (Linear congruential generator) based...