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Design and fabrication of MEMS-type compliant overhang flip-chip interconnect for RF applications

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With the increase of I/O density and scaling of interconnects, conventional solder ball interconnects are required to be made smaller. As a result, the reliability of the conventional solder ball flip-chip interconnects worsens. One method to mitigate this issue is by using underfill. However, underfill undermines the reworkability of the solder joints and is challenging to apply when the gap between chip and substrate is small. Another approach to enhance the reliability is to use taller solder ball interconnects, which is however usually more costly. Instead of using conventional solder ball interconnects, compliant interconnects have also been researched in the past few decades to mitigate the reliability issue. The use of compliant structures can compensate for the coefficient of thermal expansion (CTE) mismatch between a Si chip and an organic substrate. In this work, we present the design and fabrication of MEMS-type compliant overhang flip-chip interconnects. The structures are placed at the end of a coplanar waveguide (CPW) as interconnects between CPWs to research their performance at radio frequency (RF). A micro-fabrication process was adopted to build the interconnects. The CPWs are fabricated using conventional e-beam deposition followed by photolithography and then copper electroplating. The compliant overhangs were fabricated on top of a dome of reflowed photoresist on the CPWs to form a curved shape. The reflow and hard bake of the photoresist requires a process temperature of above 220 °C, which is similar to the reflow temperature of a Sn-Ag-Cu (SAC) solder. Therefore we believe our process is compatible with SAC solder processing infrastructures in terms of process temperature. The fabricated structures show high yield and uniformity. Due to the use of a micro-fabrication based process, the structures have the potential to be scaled and be compatible to wafer level packaging. The CPWs were then flip-chip bonded with the compliant interconnect as transitions. The RF performance of the interconnects up to 50 GHz will be presented.
IMAPS - International Microelectronics Assembly and Packaging Society
Title: Design and fabrication of MEMS-type compliant overhang flip-chip interconnect for RF applications
Description:
With the increase of I/O density and scaling of interconnects, conventional solder ball interconnects are required to be made smaller.
As a result, the reliability of the conventional solder ball flip-chip interconnects worsens.
One method to mitigate this issue is by using underfill.
However, underfill undermines the reworkability of the solder joints and is challenging to apply when the gap between chip and substrate is small.
Another approach to enhance the reliability is to use taller solder ball interconnects, which is however usually more costly.
Instead of using conventional solder ball interconnects, compliant interconnects have also been researched in the past few decades to mitigate the reliability issue.
The use of compliant structures can compensate for the coefficient of thermal expansion (CTE) mismatch between a Si chip and an organic substrate.
In this work, we present the design and fabrication of MEMS-type compliant overhang flip-chip interconnects.
The structures are placed at the end of a coplanar waveguide (CPW) as interconnects between CPWs to research their performance at radio frequency (RF).
A micro-fabrication process was adopted to build the interconnects.
The CPWs are fabricated using conventional e-beam deposition followed by photolithography and then copper electroplating.
The compliant overhangs were fabricated on top of a dome of reflowed photoresist on the CPWs to form a curved shape.
The reflow and hard bake of the photoresist requires a process temperature of above 220 °C, which is similar to the reflow temperature of a Sn-Ag-Cu (SAC) solder.
Therefore we believe our process is compatible with SAC solder processing infrastructures in terms of process temperature.
The fabricated structures show high yield and uniformity.
Due to the use of a micro-fabrication based process, the structures have the potential to be scaled and be compatible to wafer level packaging.
The CPWs were then flip-chip bonded with the compliant interconnect as transitions.
The RF performance of the interconnects up to 50 GHz will be presented.

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