Implement Multichannel Fractional Sample Rate Convertor using Genetic Algorithm

In this paper reduce power of multichannel fractional sample rate convertor by minimized hamming distance between consecutive coefficients of filter using Genetic algorithm. The main component of multichannel fractional sample rate convertor is Cascaded multiple architecture finite impulse response filter (CMFIR filter). CMFIR is implemented by cascading of cascaded integrator-comb (CIC) & multiply accumulate architecture (MAC) FIR filter. Genetic algorithm minimizes the hamming distance between consecutive coefficients of CMFIR filter. By Minimizing the hamming distance of consecutive filter coefficient reduces the transaction from 0 to 1 or 1 to 0. These techniques reduce the switching activity of CMOS transistor which is directly reduces Dynamic power consumption by multichannel sample rate convertor, it also minimizes the total power consumption of multichannel fractional sample rate convertor. later than use genetic algorithm on 1 to 128 channel Down sample rate convertor total power reduced by 3.44% to 61.56%, dynamic power reduced by 9.09% to 56.25% .1 to 128 channel Up sample rate convertor total power reduced by 2.81% to 45.42%, dynamic power reduced by 4.76% to 56%, 1 to 128 channel fractional sample rate convertor total power reduced by 1.44% to 17.17%, dynamic power reduced by 6.25% to 19.92%.