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Package-On-Package (PoP) Solder Short FA Technique
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ABSTRACT
Package on package
(PoP) is an integrated circuit packaging method to combine vertically discrete logic and memory ball grid array (BGA) packages. Two or more packages are installed atop each other, i.e. stacked, with a standard interface to route signals between them. This allows higher component density in devices, such as mobile phones, personal digital assistants (PDA), and digital cameras. The package on package technique tries to combine the benefits of traditional packaging with the benefits of die-stacking techniques, while avoiding their drawbacks. The most obvious benefit is motherboard space savings. PoP uses much less PCB area. Electrically, PoP offers benefits by minimizing track length between different interoperating parts, such as a controller and memory. This yields better electrical performance of devices, since shorter routing of interconnections between circuits yields faster signal propagation and reduced noise and cross-talk.
PoP package board-assembly has its own challenge. Typically a solder ball to solder ball short would happen if things go wrong during assembly. This is just one type of failure mechanism, other usual problems associated with BGA assembly would happen too. For hairline short, typical X-ray tool would not help if those shorts are fine enough to be missed by X-ray. In that context, PoP failure analysis is very challenging. A lapping technique was used to vertically grind from memory side to the point where all solder joints were visible from top. Mounting epoxy was used through a vacuum-impregnation to hold the solder joints.
Looking from the top, for solder ball joint to solder ball joint hairline short, frozen in-place by molding epoxy becomes easy to see through a microscope as all the interconnections can be viewed simultaneously.
Once a solder-to-solder short is visually identified, SEM and EDX was used to confirm the shorting material to be solder. Further checks on memory BGA showed presence of fiber material between the balls. This its concluded that solder bridged through the fiber during the assembly of memory BGA chip to Processor chip.
Surface Mount Technology Association
Title: Package-On-Package (PoP) Solder Short FA Technique
Description:
ABSTRACT
Package on package
(PoP) is an integrated circuit packaging method to combine vertically discrete logic and memory ball grid array (BGA) packages.
Two or more packages are installed atop each other, i.
e.
stacked, with a standard interface to route signals between them.
This allows higher component density in devices, such as mobile phones, personal digital assistants (PDA), and digital cameras.
The package on package technique tries to combine the benefits of traditional packaging with the benefits of die-stacking techniques, while avoiding their drawbacks.
The most obvious benefit is motherboard space savings.
PoP uses much less PCB area.
Electrically, PoP offers benefits by minimizing track length between different interoperating parts, such as a controller and memory.
This yields better electrical performance of devices, since shorter routing of interconnections between circuits yields faster signal propagation and reduced noise and cross-talk.
PoP package board-assembly has its own challenge.
Typically a solder ball to solder ball short would happen if things go wrong during assembly.
This is just one type of failure mechanism, other usual problems associated with BGA assembly would happen too.
For hairline short, typical X-ray tool would not help if those shorts are fine enough to be missed by X-ray.
In that context, PoP failure analysis is very challenging.
A lapping technique was used to vertically grind from memory side to the point where all solder joints were visible from top.
Mounting epoxy was used through a vacuum-impregnation to hold the solder joints.
Looking from the top, for solder ball joint to solder ball joint hairline short, frozen in-place by molding epoxy becomes easy to see through a microscope as all the interconnections can be viewed simultaneously.
Once a solder-to-solder short is visually identified, SEM and EDX was used to confirm the shorting material to be solder.
Further checks on memory BGA showed presence of fiber material between the balls.
This its concluded that solder bridged through the fiber during the assembly of memory BGA chip to Processor chip.
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