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Molded Underfill Process for the SiP
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ABSTRACT
For our application and experimental, a new underfilling process is being investigated called the molded underfill. Few companies already have tried to develop this process using one flip chip. However, three flip chips are molded into the underfill process. The test vehicle consists of three 3.5x3.5mm flip chips, one saw filter, and several passive components. The package dimension is 11x11mm, and the substrate has 4 layers with the thickness of 0.3mm. Two classes of daisy chin chips are used as dummy to perform DC electrical tests.
Vital process factors are determined. Then, the process conditions are optimized. Afterwards, comparison is made between a reliability test and the reliability level of molded underfill sample with conventional underfilled and molded sample. As a result, the reliability test of the MUF (Molded Underfilling) sample shows good promise.
Surface Mount Technology Association
Title: Molded Underfill Process for the SiP
Description:
ABSTRACT
For our application and experimental, a new underfilling process is being investigated called the molded underfill.
Few companies already have tried to develop this process using one flip chip.
However, three flip chips are molded into the underfill process.
The test vehicle consists of three 3.
5x3.
5mm flip chips, one saw filter, and several passive components.
The package dimension is 11x11mm, and the substrate has 4 layers with the thickness of 0.
3mm.
Two classes of daisy chin chips are used as dummy to perform DC electrical tests.
Vital process factors are determined.
Then, the process conditions are optimized.
Afterwards, comparison is made between a reliability test and the reliability level of molded underfill sample with conventional underfilled and molded sample.
As a result, the reliability test of the MUF (Molded Underfilling) sample shows good promise.
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