Symmetric thickness modulation in MoS2/WSe2 heterostructures: tuning mobility and PVCR for next-generation electronics

Abstract Two-dimensional transition metal dichalcogenide heterostructures, such as MoS2/WSe2, offer unique electronic properties and atomic-scale thickness, making them promising candidates for next-generation electronic devices. However, optimizing their performance requires a deeper understanding of how layer thickness influences key electrical parameters. This study systematically examines how symmetric layer-number variations influence key electrical properties, including mobility, threshold voltage (V th), and peak-to-valley current ratio (PVCR), in MoS2/WSe2 field-effect transistors (FETs) across a broad thickness range (3/3–137/137 layers). The 12/12-layer configuration achieves a maximum PVCR of 105, attributed to efficient band-to-band tunneling, while the 19/19-layer configuration demonstrates peak mobility of 25.41 cm2 V·s−1, highlighting the role of interlayer coupling in enhancing device performance. The 12–40-layer range emerges as a versatile thickness range for balancing these properties, suitable for various device applications. The study also investigates pristine MoS2 and WSe2 layers, revealing their individual optimal thicknesses, with peak mobilities of 59.01 cm2 V·s−1 at 11 layers and 96.3 cm2 V·s−1 at 12 layers, respectively. A 24 h acetone exposure test on single-layer WSe2 FETs underscores the environmental vulnerability of ultra-thin configurations, revealing extended depletion voltage ranges (up to 80 V) and insulator-like behavior. These findings demonstrate the critical importance of symmetric thickness control in enhancing the multifunctionality and robustness of MoS2/WSe2 heterostructures. They pave the way for scalable, high-performance electronic and optoelectronic applications, including multi-functional transistors and environmentally resilient devices.