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Enhancing analog circuit security through obfuscation
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The focus of this dissertation is the safeguarding of analog circuits against IP piracy attacks, which includes the development of a novel method to secure analog IP, the assessment of existing analog attack algorithms, and the development of metrics to measure the resilience of state-of-the-art analog obfuscation techniques. The security technique provides key-based obfuscation of transistor dimensions to mask the biasing conditions of an analog circuit. An operational amplifier (op-amp) obfuscated with a 10-bit key results in a probability of determining the correct key with a brute-force attack to 9.78x10^-2, where a correct key results in a gain of 64 dB, while an incorrect key results in at least 30% degradation in the gain of the op-amp. To measure the resiliency of analog obfuscation techniques, various attack algorithms are presented, and an analysis on the performance of analog attack algorithms when considering non-ideal threat scenarios is performed, which includes the development of metrics to assess the amount of time required to setup and execute an attack. The evaluation of the metric indicates that the monotonic attack is the fastest to execute for single-stage analog circuits, but fails to return a correct key for multi-stage circuits that provide non-monotonic output responses. For multi-stage analog circuits, the key-spacing attack is the fastest to execute; however, the attack is only applicable to key-based obfuscation techniques. The SMT-based attack is 224x slower than the monotonic attack and 2240x slower than the key-spacing attack, where the attack requires approximately 15 hours to determine the correct key of an 18-bit obfuscated analog front-end. The genetic algorithm (GA) based attack is 121091x slower than a monotonic attack for a single stage analog circuit, and failed to return the correct key for muti-stage analog circuits. The analysis of the resilience metric indicates that the current analog attack algorithms are inefficient when considering non-ideal threat scenarios and are not applicable to all analog obfuscation techniques or to multi-stage obfuscated circuits. Notably, a novel DC-based nodal analysis algorithm is developed to measure the security resilience of analog obfuscation techniques considered under various attack scenarios. The DNA attack successfully eliminated 99.1% and 99.98% of the keys used to secure an analog front-end circuit with key-based and multi-threshold obfuscation, respectively. The utilization of the DNA attack for different real-world scenarios provide a standard metric to effectively evaluate the strength of analog obfuscation techniques. In summary, the work described in this dissertation enhances analog circuit security against IP piracy attacks and provides metrics to measure the efficacy of current and future obfuscation methodologies.
Title: Enhancing analog circuit security through obfuscation
Description:
The focus of this dissertation is the safeguarding of analog circuits against IP piracy attacks, which includes the development of a novel method to secure analog IP, the assessment of existing analog attack algorithms, and the development of metrics to measure the resilience of state-of-the-art analog obfuscation techniques.
The security technique provides key-based obfuscation of transistor dimensions to mask the biasing conditions of an analog circuit.
An operational amplifier (op-amp) obfuscated with a 10-bit key results in a probability of determining the correct key with a brute-force attack to 9.
78x10^-2, where a correct key results in a gain of 64 dB, while an incorrect key results in at least 30% degradation in the gain of the op-amp.
To measure the resiliency of analog obfuscation techniques, various attack algorithms are presented, and an analysis on the performance of analog attack algorithms when considering non-ideal threat scenarios is performed, which includes the development of metrics to assess the amount of time required to setup and execute an attack.
The evaluation of the metric indicates that the monotonic attack is the fastest to execute for single-stage analog circuits, but fails to return a correct key for multi-stage circuits that provide non-monotonic output responses.
For multi-stage analog circuits, the key-spacing attack is the fastest to execute; however, the attack is only applicable to key-based obfuscation techniques.
The SMT-based attack is 224x slower than the monotonic attack and 2240x slower than the key-spacing attack, where the attack requires approximately 15 hours to determine the correct key of an 18-bit obfuscated analog front-end.
The genetic algorithm (GA) based attack is 121091x slower than a monotonic attack for a single stage analog circuit, and failed to return the correct key for muti-stage analog circuits.
The analysis of the resilience metric indicates that the current analog attack algorithms are inefficient when considering non-ideal threat scenarios and are not applicable to all analog obfuscation techniques or to multi-stage obfuscated circuits.
Notably, a novel DC-based nodal analysis algorithm is developed to measure the security resilience of analog obfuscation techniques considered under various attack scenarios.
The DNA attack successfully eliminated 99.
1% and 99.
98% of the keys used to secure an analog front-end circuit with key-based and multi-threshold obfuscation, respectively.
The utilization of the DNA attack for different real-world scenarios provide a standard metric to effectively evaluate the strength of analog obfuscation techniques.
In summary, the work described in this dissertation enhances analog circuit security against IP piracy attacks and provides metrics to measure the efficacy of current and future obfuscation methodologies.
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