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Fearless Automatic Parallelisation
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Despite significant advancements in parallel programming techniques, stagnating single-core performance and the increasing prevalence of multi-core processors demand new approaches to automatic parallelisation. Parallelising code using existing approaches often requires significant programmer intervention. In the first part of this thesis, I present Fearless: a new programming language with a novel approach to reference capabilities. Fearless's language design enables safe automatic parallelisation alongside other useful features such as correct caching, strong exception safety, and safe representation invariants. Alongside a formal model for Fearless, I present a prototype compiler for the language.
In the second part of this thesis, I present a dedicated library for building flows of computation over data, which can then be parallelised as an unobservable compiler optimisation. Additionally, I present multiple parallelisation strategies and an evaluation of my approaches to automatic parallelisation.
Title: Fearless Automatic Parallelisation
Description:
Despite significant advancements in parallel programming techniques, stagnating single-core performance and the increasing prevalence of multi-core processors demand new approaches to automatic parallelisation.
Parallelising code using existing approaches often requires significant programmer intervention.
In the first part of this thesis, I present Fearless: a new programming language with a novel approach to reference capabilities.
Fearless's language design enables safe automatic parallelisation alongside other useful features such as correct caching, strong exception safety, and safe representation invariants.
Alongside a formal model for Fearless, I present a prototype compiler for the language.
In the second part of this thesis, I present a dedicated library for building flows of computation over data, which can then be parallelised as an unobservable compiler optimisation.
Additionally, I present multiple parallelisation strategies and an evaluation of my approaches to automatic parallelisation.
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