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Characterization of a high-speed radio-frequency sampling and demultiplexing circuit based on the cascade connection of pin photodiodes
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Herein, we apply theoretical models to characterize the transfer function and frequency response of a complex optoelectronic circuit that comprises a primary ultrafast sampling circuit followed by a cascade connection of N demultiplexing stages. The successive radio-frequency optoelectronic samplers were based on the cascade connection of positive-intrinsic-negative-photodiodes (PIN-PDs). We developed a procedure to calculate the principal design parameters that allows us to use optical power for each sampling and demultiplexing stage, such that the circuit can be designed based on the application requirements. The results obtained from the theoretical models were compared with the measurements obtained from the 2.5 GS/s sampling circuit connected in cascade with a 1.25 GS/s and a 625 MS/s demultiplexing circuit implemented using commercial PIN-PDs
The Scientific and Technological Research Council of Turkey (TUBITAK-ULAKBIM) - DIGITAL COMMONS JOURNALS
Title: Characterization of a high-speed radio-frequency sampling and demultiplexing circuit based on the cascade connection of pin photodiodes
Description:
Herein, we apply theoretical models to characterize the transfer function and frequency response of a complex optoelectronic circuit that comprises a primary ultrafast sampling circuit followed by a cascade connection of N demultiplexing stages.
The successive radio-frequency optoelectronic samplers were based on the cascade connection of positive-intrinsic-negative-photodiodes (PIN-PDs).
We developed a procedure to calculate the principal design parameters that allows us to use optical power for each sampling and demultiplexing stage, such that the circuit can be designed based on the application requirements.
The results obtained from the theoretical models were compared with the measurements obtained from the 2.
5 GS/s sampling circuit connected in cascade with a 1.
25 GS/s and a 625 MS/s demultiplexing circuit implemented using commercial PIN-PDs.
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