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A Cluster-Based Dynamic Algorithm For Application Mapping On The Noc Architectures

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The effectiveness of Network on Chip (NoC) is highly dependent on how well the real-time tasks are mapped on NoC communication infrastructure. In this paper an efficient dynamic scheduling algorithm is proposed and implemented on standard Mesh topology as well as on similar recently proposed LECΔ topology. The performance of proposed algorithm is evaluated in terms of Load Imbalance Factor (LIF), makespan, communication cost and system throughput. The results are evaluated with different task distribution profile using Java-based simulator. The behavior of load distribution is estimated and compared with different performance metrices on two considered topologies. The simulation results show an improvement of 32.57% in LIF at lesser execution time. When comparing the performance of two networks in terms of makespan, the results show a reduction of 43.7% in case of 4 x 4 LECΔ topology as compared to 4 x 4 Mesh topology. The comparative study in terms of LIF, makespan and system throughput is carried out by implementing other existing techniques on both the considered NoC architectures which shows that the proposed approach is an optimized solution for task mapping at considerable reduced cost on considered NoC architectures. The analysis of simulation results shows that the proposed approach may be considered a better choice and implemented on similar NoC architectures as well as other than mesh-based topologies.
Title: A Cluster-Based Dynamic Algorithm For Application Mapping On The Noc Architectures
Description:
The effectiveness of Network on Chip (NoC) is highly dependent on how well the real-time tasks are mapped on NoC communication infrastructure.
In this paper an efficient dynamic scheduling algorithm is proposed and implemented on standard Mesh topology as well as on similar recently proposed LECΔ topology.
The performance of proposed algorithm is evaluated in terms of Load Imbalance Factor (LIF), makespan, communication cost and system throughput.
The results are evaluated with different task distribution profile using Java-based simulator.
The behavior of load distribution is estimated and compared with different performance metrices on two considered topologies.
The simulation results show an improvement of 32.
57% in LIF at lesser execution time.
When comparing the performance of two networks in terms of makespan, the results show a reduction of 43.
7% in case of 4 x 4 LECΔ topology as compared to 4 x 4 Mesh topology.
The comparative study in terms of LIF, makespan and system throughput is carried out by implementing other existing techniques on both the considered NoC architectures which shows that the proposed approach is an optimized solution for task mapping at considerable reduced cost on considered NoC architectures.
The analysis of simulation results shows that the proposed approach may be considered a better choice and implemented on similar NoC architectures as well as other than mesh-based topologies.

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