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Viscoelastic Influence on the Board Level Assessment of Wafer Level Packages Under Drop Impact and Under Thermal Cycling

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Abstract Structural components such as printed circuit boards (PCBs) are critical in the thermomechanical reliability assessment of electronic packages. Previous studies have shown that geometric parameters such as thickness and mechanical properties like elastic modulus of PCBs have a direct influence on the reliability of electronic packages. Elastic material properties of PCBs are commonly characterized using equipment such as tensile testers and used in computational studies. However, in certain applications viscoelastic material properties are important. Viscoelastic influence on materials is evident when one exceeds the glass transition temperature of materials. Operating conditions or manufacturing conditions such as lamination and soldering may expose components to temperatures that exceed the glass transition temperatures. Knowing the viscoelastic behavior of the different components of electronic packages is important in order to perform accurate reliability assessment and design components such as PCBs that will remain dimensionally stable after the manufacturing process. Previous researchers have used creep and stress relaxation test data to obtain the Prony series terms that represent the viscoelastic behavior and perform analysis. Others have used dynamic mechanical analysis in order to obtain frequency-domain master curves that were converted to time domain before obtaining the Prony series terms. In this paper, nonlinear solvers were used on frequency domain master curve results from dynamic mechanical analysis to obtain Prony series terms and perform finite element analysis on the impact of adding viscoelastic properties when performing reliability assessment. The computational study results were used to perform a comparative assessment to understand the impact of including viscoelastic behavior in reliability analysis under thermal cycling and drop testing for Wafer Level Chip Scale Packages.
Title: Viscoelastic Influence on the Board Level Assessment of Wafer Level Packages Under Drop Impact and Under Thermal Cycling
Description:
Abstract Structural components such as printed circuit boards (PCBs) are critical in the thermomechanical reliability assessment of electronic packages.
Previous studies have shown that geometric parameters such as thickness and mechanical properties like elastic modulus of PCBs have a direct influence on the reliability of electronic packages.
Elastic material properties of PCBs are commonly characterized using equipment such as tensile testers and used in computational studies.
However, in certain applications viscoelastic material properties are important.
Viscoelastic influence on materials is evident when one exceeds the glass transition temperature of materials.
Operating conditions or manufacturing conditions such as lamination and soldering may expose components to temperatures that exceed the glass transition temperatures.
Knowing the viscoelastic behavior of the different components of electronic packages is important in order to perform accurate reliability assessment and design components such as PCBs that will remain dimensionally stable after the manufacturing process.
Previous researchers have used creep and stress relaxation test data to obtain the Prony series terms that represent the viscoelastic behavior and perform analysis.
Others have used dynamic mechanical analysis in order to obtain frequency-domain master curves that were converted to time domain before obtaining the Prony series terms.
In this paper, nonlinear solvers were used on frequency domain master curve results from dynamic mechanical analysis to obtain Prony series terms and perform finite element analysis on the impact of adding viscoelastic properties when performing reliability assessment.
The computational study results were used to perform a comparative assessment to understand the impact of including viscoelastic behavior in reliability analysis under thermal cycling and drop testing for Wafer Level Chip Scale Packages.

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