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Efficient and Flexible Dynamic Reconfiguration for Multi Context Architectures
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Dynamic reconfiguration is possible on both fine-grain and coarse-grain architectures. One of the used methodology used consists in the use of multi-context architectures. Unfortunately, the multiple contexts bring power and area overhead. This paper introduces the Dynamic Unifier and reConfigurable blocK (DUCK) concept, a new structure to perform efficiently dynamic reconfiguration on both custom designed fine-grain and coarse grain architectures. The DUCK allows to separate the configuration path and the configuration registers which facilitates simultaneous configuration and computing steps. The reconfiguration process is presented in detail, and synthesis results are given for different structures. Our solution is finally validated with the implementation of a WCDMA (Wideband Code Division Multiple Access) receiver on a multi-context embedded FPGA and on the dynamically reconfigurable processor DART. This implementation demonstrates the interest and the efficiency of the use of dynamic reconfiguration and the proposed flexible structure.
Journal of Integrated Circuits and Systems
Title: Efficient and Flexible Dynamic Reconfiguration for Multi Context Architectures
Description:
Dynamic reconfiguration is possible on both fine-grain and coarse-grain architectures.
One of the used methodology used consists in the use of multi-context architectures.
Unfortunately, the multiple contexts bring power and area overhead.
This paper introduces the Dynamic Unifier and reConfigurable blocK (DUCK) concept, a new structure to perform efficiently dynamic reconfiguration on both custom designed fine-grain and coarse grain architectures.
The DUCK allows to separate the configuration path and the configuration registers which facilitates simultaneous configuration and computing steps.
The reconfiguration process is presented in detail, and synthesis results are given for different structures.
Our solution is finally validated with the implementation of a WCDMA (Wideband Code Division Multiple Access) receiver on a multi-context embedded FPGA and on the dynamically reconfigurable processor DART.
This implementation demonstrates the interest and the efficiency of the use of dynamic reconfiguration and the proposed flexible structure.
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