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A Hybrid-Mode LDO Regulator with Fast Transient Response Performance for IoT applications

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A hybrid-mode low-drop out (LDO) voltage regulator with fast transient response performance for IoT applications is proposed in this paper. The proposed LDO regulator consist of two sections. First section is an analog regulator which includes a folded cascode operational amplifier to achieve good PSRR. Second section is current DAC and detectors whitch includes a cource current DAC, sink current DAC, undershoot detectors, and overshoot detectors. The current DAC and detectors are designed to obtain a low drop out and fast transient response. The proposed hybrid-mode LDO voltage regulator has been designed, simulated and layouted in Cadence using TSMC 90 nm CMOS technology. The input range of the LDO regulator is 1.2–2.0 V, and it can produces an output voltage of 1.2V. The LDO regulator achieves 58uA quiescent current, -69 PSRR @ 1 KHz noise frequency and an output voltage drop of around 60mV for a load current step of 100 mA. The final design occupies approximately 0.09 mm2.
Title: A Hybrid-Mode LDO Regulator with Fast Transient Response Performance for IoT applications
Description:
A hybrid-mode low-drop out (LDO) voltage regulator with fast transient response performance for IoT applications is proposed in this paper.
The proposed LDO regulator consist of two sections.
First section is an analog regulator which includes a folded cascode operational amplifier to achieve good PSRR.
Second section is current DAC and detectors whitch includes a cource current DAC, sink current DAC, undershoot detectors, and overshoot detectors.
The current DAC and detectors are designed to obtain a low drop out and fast transient response.
The proposed hybrid-mode LDO voltage regulator has been designed, simulated and layouted in Cadence using TSMC 90 nm CMOS technology.
The input range of the LDO regulator is 1.
2–2.
0 V, and it can produces an output voltage of 1.
2V.
The LDO regulator achieves 58uA quiescent current, -69 PSRR @ 1 KHz noise frequency and an output voltage drop of around 60mV for a load current step of 100 mA.
The final design occupies approximately 0.
09 mm2.

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