Power system security assessment through analog computation

This dissertation proposes a methodology for power system security assessment through analog computation. By exploiting the strengths of analog computation a more robust security assessment can be performed as compared to traditional methods. Security assessment is currently performed by power system operators utilizing digital computers and determines the power system structure, states and level of security based on telemetered data and knowledge of the system. Ideally this process would occur in real time but due to the limitations of digital computers and telemetry systems the security assessment is currently conducted at periodic intervals of ten to fifteen minutes. This process requires a tremendous amount of computation for large systems. In order to provide updated assessment at such time intervals, not even in real time, numerous assumptions and simplifications of the power system models and analyses are required to simplify and speed up the digital computations. Due to its inherent speed and computational efficiency analog computation is proving to be a viable alternative. Analog computation by definition is continuous in time and embodies an entirely different paradigm to computing as compared to discrete time methods. Security assessment for digital computers consists of topology estimations, state estimation and contingency analysis. The theory and practical approaches to these tasks through digital, discrete time, computational methods are fairly mature at this point in time but do not translate directly to analog computation. A robust analog computation engine along with corresponding computational theory is required in order to make use of analog methods for power system security assessment. This dissertation provides the relevant theory, hardware realization and application of an analog computer for power system security assessment.