Analytical Modeling of Short-Channel Behavior of Accumulation-Mode Transistors on Silicon-on-Insulator Substrate

In this paper we present a theoretical analysis of accumulation-mode (AM) silicon-on-insulator metal-oxide-semiconductor field-effect transistors (SOI MOSFET's) with gate lengths in the deep submicron region down to 0.1 µm. A two-dimensional analytical model has been developed which describes the short-channel behavior of the threshold voltage and subthreshold slope. The results are supported by numerical device simulation. It is found that the key factor for controlling short-channel effects in the AM SOI MOSFET is the reduction of thickness of the SOI layer. With 50 nm SOI film, the threshold voltage roll-off can be suppressed down to 0.25 µm gate length. The subthreshold slope factor degradation below 0.2 µm gate length is difficult to suppress since there is almost no influence of channel doping variation. Compared to the inversion-mode (IM) transistor, the AM SOI MOSFET has an inherently higher sensitivity to device parameter variations.