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Automatic Current Sharing Mechanism in Two-phase Series Capacitor Buck DC-DC Converter (2-pscB)

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In this chapter, we introduce the concept of the Inherited Automatic Current Sharing Mechanism (ACSM) in a two-phase series capacitor buck topology (2-pscB). This topology was introduced to power laptops as low-voltage and high-current Voltage Regulator Modules as well as non-isolated Point-of-Load converters (Vin < 12 V). To satisfy the converter stability, a state-space modeling technique of switching intervals coupled with parasitic component linearization is developed. Due to the series capacitor charging period miscalculation, the applicability of the ACSM of 2-pscB switching topology for high-power electronic applications is still very limited. Inserting a series capacitor between power switches of phase A increases loop parasitic inductance, introduces a time delay mismatch between the gate voltages of the two switches, and causes interference with the synchronization of the dead time between both phases of 2-pscB converters since the phase B has no series capacitor. This mismatch reduces the heat distribution efficiency and lifetime. As such, a complete model study delivered by the converter is required to design a robust controller. Driven to explore the series capacitor voltage feedback mechanism, frequency analysis of transfer functions, and filter behavior with experimental prototype examples (Vin < 120 V) have been presented for the first time to demonstrate the theoretical analysis. Obtained efficiency was up to 94.9% at full load.
Title: Automatic Current Sharing Mechanism in Two-phase Series Capacitor Buck DC-DC Converter (2-pscB)
Description:
In this chapter, we introduce the concept of the Inherited Automatic Current Sharing Mechanism (ACSM) in a two-phase series capacitor buck topology (2-pscB).
This topology was introduced to power laptops as low-voltage and high-current Voltage Regulator Modules as well as non-isolated Point-of-Load converters (Vin < 12 V).
To satisfy the converter stability, a state-space modeling technique of switching intervals coupled with parasitic component linearization is developed.
Due to the series capacitor charging period miscalculation, the applicability of the ACSM of 2-pscB switching topology for high-power electronic applications is still very limited.
Inserting a series capacitor between power switches of phase A increases loop parasitic inductance, introduces a time delay mismatch between the gate voltages of the two switches, and causes interference with the synchronization of the dead time between both phases of 2-pscB converters since the phase B has no series capacitor.
This mismatch reduces the heat distribution efficiency and lifetime.
As such, a complete model study delivered by the converter is required to design a robust controller.
Driven to explore the series capacitor voltage feedback mechanism, frequency analysis of transfer functions, and filter behavior with experimental prototype examples (Vin < 120 V) have been presented for the first time to demonstrate the theoretical analysis.
Obtained efficiency was up to 94.
9% at full load.

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