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Implementasi Hazard Detection dan Data Forwarding pada Soft-core Prosesor Sederhana
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Abstract—This paper presents the implementation of hazard detection and data forwarding in the pipeline concept used in developing TEUS-1, a simple, 16-bit, soft-core processor. This processor is planned to be used for the learning process related to examples of processor design for undergraduate students. The pipeline implemented on TEUS-1 is 5 stages. In initial testing, 10 data hazards were found due to the existence of data dependencies between sequential instructions. In order to eliminate these data hazards, an interlocking algorithm and a data forwarding algorithm has been added to the instruction decoding section and to the execution unit section, respectively. With the addition of this algorithm, all data hazards found during initial testing can be eliminated.
Keywords: hazard detection, data forwarding, interlocking, data hazard, pipeline
Abstrak—Makalah ini mempresentasikan tentang implementasi dari hazard detection dan data forwarding pada konsep pipeline yang digunakan dalam pengembangan soft-core prosesor sederhana, yaitu TEUS-1. Prosesor ini merupakan prosesor 16 bits yang rencananya akan digunakan untuk proses pembelajaran terkait dengan contoh desain prosesor untuk mahasiswa program Sarjana. Pipeline yang diimplementasikan pada TEUS-1 adalah 5 stages. Dalam pengujian awal, ditemukan adanya 10 data hazard akibat dari adanya data dependencies antar instruksi yang berurutan. Untuk menghilangkan data hazard ini, telah ditambahkan algoritma interlocking pada bagian instruction decoding dan algoritma data forwarding pada bagian execution unit. Dengan adanya penambahan algoritma ini, seluruh data hazard yang ditemukan pada saat pengujian awal dapat dihilangkan.
Kata kunci: hazard detection, data forwarding, interlocking, data hazard, pipeline
Title: Implementasi Hazard Detection dan Data Forwarding pada Soft-core Prosesor Sederhana
Description:
Abstract—This paper presents the implementation of hazard detection and data forwarding in the pipeline concept used in developing TEUS-1, a simple, 16-bit, soft-core processor.
This processor is planned to be used for the learning process related to examples of processor design for undergraduate students.
The pipeline implemented on TEUS-1 is 5 stages.
In initial testing, 10 data hazards were found due to the existence of data dependencies between sequential instructions.
In order to eliminate these data hazards, an interlocking algorithm and a data forwarding algorithm has been added to the instruction decoding section and to the execution unit section, respectively.
With the addition of this algorithm, all data hazards found during initial testing can be eliminated.
Keywords: hazard detection, data forwarding, interlocking, data hazard, pipeline
Abstrak—Makalah ini mempresentasikan tentang implementasi dari hazard detection dan data forwarding pada konsep pipeline yang digunakan dalam pengembangan soft-core prosesor sederhana, yaitu TEUS-1.
Prosesor ini merupakan prosesor 16 bits yang rencananya akan digunakan untuk proses pembelajaran terkait dengan contoh desain prosesor untuk mahasiswa program Sarjana.
Pipeline yang diimplementasikan pada TEUS-1 adalah 5 stages.
Dalam pengujian awal, ditemukan adanya 10 data hazard akibat dari adanya data dependencies antar instruksi yang berurutan.
Untuk menghilangkan data hazard ini, telah ditambahkan algoritma interlocking pada bagian instruction decoding dan algoritma data forwarding pada bagian execution unit.
Dengan adanya penambahan algoritma ini, seluruh data hazard yang ditemukan pada saat pengujian awal dapat dihilangkan.
Kata kunci: hazard detection, data forwarding, interlocking, data hazard, pipeline.
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