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High Resolution Patterning Technology to enable Panel Based Advanced Packaging

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As the semiconductor industry is maturing, the reign of Moore's law has come to an end. New approaches beyond scaling down transistors have taken over the burden of continued and rapid performance growth. These new approaches are essentially related to integration of components. Decrease of form-factors and increase of functionality and performance is accomplished by sophisticated integration schemes. In other words, back-end Advanced Packaging technologies continue to grow ever more important to not only meet performance and size goals but also to drive down cost. Although front-end manufacturing is naturally tied to round semiconductor wafers, some of the most recent back-end technologies are no longer required to be performed on round substrates. Embedded die, fan-out and interposer based packages can be manufactured on larger and more convenient substrates such as square and rectangular glass, molded or organic panels thus enabling economy of scale efficiency gains and cost savings. This work focuses specifically on the challenges surrounding the lithographic patterning of these “non-round” substrates using a high-resolution 2x reduction stepper lithography system. The paper provides an overview of the various panel-based advanced packaging applications including Panel Fan-Out (P-FO), 2.5D glass interposers and high-density organic substrate interposers. The specific lithography requirements and challenges are highlighted and analyzed. These include patterning resolution down to 2μm and beyond, layer to layer overlay accuracy of better than 1μm, depth of focus of 15μm and more, resist sidewall angles of above 80 degrees, ability to deal with topographic variations, ability to handle and process panels with severe warpage, ability to prevent system contamination due to outgassing of photoresists or polyimides, ability to process devices without so-called field stitching only to name a few. Last but not least, cost implications of the lithography process are analyzed and discussed. Ultimately, the work attempts to assess the readiness of the industry for panel based Advanced Packaging specifically from a lithography perspective. The potential cost advantages but also the hurdles and challenges related to panel-based advanced packaging patterning technologies are highlighted.
IMAPS - International Microelectronics Assembly and Packaging Society
Title: High Resolution Patterning Technology to enable Panel Based Advanced Packaging
Description:
As the semiconductor industry is maturing, the reign of Moore's law has come to an end.
New approaches beyond scaling down transistors have taken over the burden of continued and rapid performance growth.
These new approaches are essentially related to integration of components.
Decrease of form-factors and increase of functionality and performance is accomplished by sophisticated integration schemes.
In other words, back-end Advanced Packaging technologies continue to grow ever more important to not only meet performance and size goals but also to drive down cost.
Although front-end manufacturing is naturally tied to round semiconductor wafers, some of the most recent back-end technologies are no longer required to be performed on round substrates.
Embedded die, fan-out and interposer based packages can be manufactured on larger and more convenient substrates such as square and rectangular glass, molded or organic panels thus enabling economy of scale efficiency gains and cost savings.
This work focuses specifically on the challenges surrounding the lithographic patterning of these “non-round” substrates using a high-resolution 2x reduction stepper lithography system.
The paper provides an overview of the various panel-based advanced packaging applications including Panel Fan-Out (P-FO), 2.
5D glass interposers and high-density organic substrate interposers.
The specific lithography requirements and challenges are highlighted and analyzed.
These include patterning resolution down to 2μm and beyond, layer to layer overlay accuracy of better than 1μm, depth of focus of 15μm and more, resist sidewall angles of above 80 degrees, ability to deal with topographic variations, ability to handle and process panels with severe warpage, ability to prevent system contamination due to outgassing of photoresists or polyimides, ability to process devices without so-called field stitching only to name a few.
Last but not least, cost implications of the lithography process are analyzed and discussed.
Ultimately, the work attempts to assess the readiness of the industry for panel based Advanced Packaging specifically from a lithography perspective.
The potential cost advantages but also the hurdles and challenges related to panel-based advanced packaging patterning technologies are highlighted.

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