Successive approximation type resistance to digital converter

Abstract Successive approximation type direct resistance to digital converter (SAR RDC) topology is presented here. The conventional SAR type ADC is augmented with an additional opamp inverting summer and a standard resistance such that the digital output of the SAR directly indicates the value of an unknown resistance connected between the output of the digital to analog converter of the SAR RDC and the inverting input of the added inverting summer. Analysis of the proposed technique presented here helps select proper components at the design stage itself to obtain minimal errors in the measurement of the unknown resistor. The major advantage of the proposed scheme is that it retains the basic architecture of an SAR ADC and hence can be implemented with all available SAR ADC architectures, including the ability to install ‘auto-ranging’. An added advantage is that the value of the unknown resistor is determined in terms of a standard resistor and hence good accuracy is easily obtained. Simulation studies and results obtained from a prototype SAR RDC built and tested, establish the efficacy of the proffered technique. The results indicate a worst-case error of < ±0.2% and no missing codes.