A Chaotic Multi‐Objective Runge–Kutta Optimization Algorithm for Optimized Circuit Design

Circuit design plays a pivotal role in engineering, ensuring the creation of efficient, reliable, and cost‐effective electronic devices. The complexity of modern circuit design problems has led to the exploration of multi‐objective optimization techniques for circuit design optimization, as traditional optimization tools fall short in handling such problems. While metaheuristic algorithms, especially genetic algorithms, have demonstrated promise, their susceptibility to premature convergence poses challenges. This paper proposes a pioneering approach, the chaotic multi‐objective Runge–Kutta algorithm (CMRUN), for circuit design optimization, building upon the Runge–Kutta optimization algorithm. By infusing chaos into the core RUN structure, a refined balance between exploration and exploitation is obtained, critical for addressing complex optimization landscapes, enabling the algorithm to navigate nonlinear and nonconvex optimization challenges effectively. This approach is extended to accommodate multiple objectives, ultimately generating Pareto Fronts for the multiple circuit design goals. The performance of CMRUN is rigorously evaluated against 11 multiobjective algorithms, encompassing 15 benchmark test functions and practical circuit design scenarios. The findings of this study underscore the efficiency and real‐world applicability of CMRUN, offering valuable insights for tailoring optimization algorithms to the real‐world circuit design challenges.