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(Invited) Vertically Stacked Graphene Junction Diodes

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Graphene is expected to be nanomaterial of the post-silicon era because of its numerous advantageous properties. The single crystal graphene thermally grown on SiC substrate is considered the most promising platform for future electric devices. Large area epitaxial graphene on SiC substrate has been successfully fabricated using high-temperature rapid thermal annealing [1]. In this study, we present vertically stacked graphene junction diodes fabricated using direct bonding technique [2–4]. Figure 1(a) shows the schematic of a stacked graphene junction diode. Two graphene layers on SiC are directly bonded to each other. Gold–coated contact pins are attached to the graphene surface to establish ohmic contact. The graphene samples and contact probes are fixed by acrylic molds. Strong nonlinear current–voltage (I-V) characteristics are observed for this simple device configuration, as shown in Fig. 1(b). In the low bias voltage (Vb) region, the resistance of the graphene diode is approximately 20 GΩ. The current abruptly increases when the bias voltage is increased to approximately 30 V. The two-terminal resistance at a high bias voltage (100 V) is approximately 21 kΩ. The vertically stacked graphene junction exhibits bidirectional thyristor-type characteristics with a high on-off ratio of approximately 106. The Fowler–Nordheim (F-N) tunneling phenomenon is observed in the sub-threshold region. The gap distance estimated from the F-N plot is approximately 6 nm, which can be attributed to the large off resistance. The Coulomb force generated by applying the bias voltage causes the two graphene layers to attract each other, resulting in an electrically conductive state. The junction voltage (Vj) of the device was measured using a four-terminal configuration. As shown in Fig. 1(c), negative resistance is observed in the low-resistance region. The effective internal resistance of the junction diode is reduced to approximately 450 Ω. The off resistance of the diodes is considerably modified by the initial distance between the graphene layers. However, the I-Vj characteristics in the negative resistance region are identical for each device. This result suggests that the cause of the negative resistance phenomena is closely related to the band structure of graphene. A vertically stacked graphene junction diode with a high on-off ratio was demonstrated. The main component of the diode comprised a pair of single-crystal graphene layers fabricated through direct bonding. The negative resistance of the graphene diode presents new possibilities for the application of functional devices, such as terahertz emitters. [1] T. Aritsuki, et al., Jpn. J. Appl. Phys. 55 (2016) 06GF03. [2] J. Du, eta al., Jpn. J. Appl. Phys. 58 (2019) SDDE01. [3] N. Murakami, et al., Jpn. J. Appl. Phys. 60 (2021) SCCD01. [4] M. Ohi, et al., Jpn. J. Appl. Phys. 62 (2023) to be published. Figure 1
The Electrochemical Society
Title: (Invited) Vertically Stacked Graphene Junction Diodes
Description:
Graphene is expected to be nanomaterial of the post-silicon era because of its numerous advantageous properties.
The single crystal graphene thermally grown on SiC substrate is considered the most promising platform for future electric devices.
Large area epitaxial graphene on SiC substrate has been successfully fabricated using high-temperature rapid thermal annealing [1].
In this study, we present vertically stacked graphene junction diodes fabricated using direct bonding technique [2–4].
Figure 1(a) shows the schematic of a stacked graphene junction diode.
Two graphene layers on SiC are directly bonded to each other.
Gold–coated contact pins are attached to the graphene surface to establish ohmic contact.
The graphene samples and contact probes are fixed by acrylic molds.
Strong nonlinear current–voltage (I-V) characteristics are observed for this simple device configuration, as shown in Fig.
1(b).
In the low bias voltage (Vb) region, the resistance of the graphene diode is approximately 20 GΩ.
The current abruptly increases when the bias voltage is increased to approximately 30 V.
The two-terminal resistance at a high bias voltage (100 V) is approximately 21 kΩ.
The vertically stacked graphene junction exhibits bidirectional thyristor-type characteristics with a high on-off ratio of approximately 106.
The Fowler–Nordheim (F-N) tunneling phenomenon is observed in the sub-threshold region.
The gap distance estimated from the F-N plot is approximately 6 nm, which can be attributed to the large off resistance.
The Coulomb force generated by applying the bias voltage causes the two graphene layers to attract each other, resulting in an electrically conductive state.
The junction voltage (Vj) of the device was measured using a four-terminal configuration.
As shown in Fig.
1(c), negative resistance is observed in the low-resistance region.
The effective internal resistance of the junction diode is reduced to approximately 450 Ω.
The off resistance of the diodes is considerably modified by the initial distance between the graphene layers.
However, the I-Vj characteristics in the negative resistance region are identical for each device.
This result suggests that the cause of the negative resistance phenomena is closely related to the band structure of graphene.
A vertically stacked graphene junction diode with a high on-off ratio was demonstrated.
The main component of the diode comprised a pair of single-crystal graphene layers fabricated through direct bonding.
The negative resistance of the graphene diode presents new possibilities for the application of functional devices, such as terahertz emitters.
[1] T.
Aritsuki, et al.
, Jpn.
J.
Appl.
Phys.
55 (2016) 06GF03.
[2] J.
Du, eta al.
, Jpn.
J.
Appl.
Phys.
58 (2019) SDDE01.
[3] N.
Murakami, et al.
, Jpn.
J.
Appl.
Phys.
60 (2021) SCCD01.
[4] M.
Ohi, et al.
, Jpn.
J.
Appl.
Phys.
62 (2023) to be published.
Figure 1.

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