EEG Processing Using VHBCSE Based FIR Filter

There is a major role for filter in noise removal. because of simple structure, stationary response and adaptively with embedded microprocessors. The Finite Impulse Response (FIR) filter has many advantages on signal processing . to process the Electroencephalography (EEG) signal the FIR filter is the best suited option. The noise in the EEG signal can reduced by using FIR filter. The hardware complexity of FIR filter is high because of multipliers present in the FIR filter. By reducing the multipliers fast and less area using FIR filter is obtained. This paper present a vertical and horizontal Binary common subexpression elimination (VHBCSE) algorithm based FIR filter to process the EEG signal. The common subexpression elimination (CSE) algorithm eliminate the bit patterns which are often occurring. The proposed FIR filter reduce noise of EEG signal rapidly ,by consuming less power and design only required less area. Xilinx ISE design suite 14.7 is used to simulate the FIR filter in FPGA and the MATLAB environment is to generate the EEG signal.