Search engine for discovering works of Art, research articles, and books related to Art and Culture
ShareThis
Javascript must be enabled to continue!

Packaging of 1.3 Tb/s Full Duplex Optical Interconnect

View through CrossRef
The electro-optical packaging process of an optical interconnect device is described. The device has an aggregate full duplex bandwidth of 1.3 Tb/s. The optical interconnect is assembled from a standard printed-circuit-board (PCB), an optical module chip (icPhotonics™ module) and a large format fiber-bundle. The icPhotonics™ module is assembled from an organic substrate, an Application-Specific-Integrated-Circuit (ASIC) die, vertical-cavity surface-emitting laser (VCSEL) matrix, Photo-diode (PD) matrix and 2 micro-lens-arrays (MLA's). The data is transmitted to and from a specially designed fiber-bundle through a second set of MLA's. Each optical device consists of a 12 × 14 matrix array, where each link transmits and receives in 8 Gb/s – totaling to a 1.344 Tb/s full duplex in each optical interconnect module and a bandwidth density of 64Gb/s/mm2 The icPhotonics™ module packaging is performed using five different flip-chip and reflow or glue steps – thus maximizing module density. The optical fiber-bundle assembly is performed after the PCB is populated, and completes a full optical-interconnect. Reliability studies had been performed successfully for the entire assembly. The optical-interconnect PCB's are routinely fabricated in a small series production scale and used as a crucial building block in Compass-EOS core-router system, creating a full mesh optical link between different line-cards and racks
Title: Packaging of 1.3 Tb/s Full Duplex Optical Interconnect
Description:
The electro-optical packaging process of an optical interconnect device is described.
The device has an aggregate full duplex bandwidth of 1.
3 Tb/s.
The optical interconnect is assembled from a standard printed-circuit-board (PCB), an optical module chip (icPhotonics™ module) and a large format fiber-bundle.
The icPhotonics™ module is assembled from an organic substrate, an Application-Specific-Integrated-Circuit (ASIC) die, vertical-cavity surface-emitting laser (VCSEL) matrix, Photo-diode (PD) matrix and 2 micro-lens-arrays (MLA's).
The data is transmitted to and from a specially designed fiber-bundle through a second set of MLA's.
Each optical device consists of a 12 × 14 matrix array, where each link transmits and receives in 8 Gb/s – totaling to a 1.
344 Tb/s full duplex in each optical interconnect module and a bandwidth density of 64Gb/s/mm2 The icPhotonics™ module packaging is performed using five different flip-chip and reflow or glue steps – thus maximizing module density.
The optical fiber-bundle assembly is performed after the PCB is populated, and completes a full optical-interconnect.
Reliability studies had been performed successfully for the entire assembly.
The optical-interconnect PCB's are routinely fabricated in a small series production scale and used as a crucial building block in Compass-EOS core-router system, creating a full mesh optical link between different line-cards and racks.

Related Results

DESAIN KEMASAN JAMUR CRISPY MBAH MAN SNACK MENGGUNAKAN METODE VALUE ENGINEERING (VE)
DESAIN KEMASAN JAMUR CRISPY MBAH MAN SNACK MENGGUNAKAN METODE VALUE ENGINEERING (VE)
The packaging used as a silent salesman to attract consumer attention. Mbah Man's UMKM sells various snack products and has not implemented packaging as a silent salesman. This stu...
Duplex Stainless Steel: Specification Requirements
Duplex Stainless Steel: Specification Requirements
ABSTRACT The use of duplex stainless steels Offshore has rapidly increased in recent years. At the same time the number of specifications for duplex stainless ste...
Can Current EDA Packaging Tools Meet the Demands of Ever-Changing 3D Packaging Technologies?
Can Current EDA Packaging Tools Meet the Demands of Ever-Changing 3D Packaging Technologies?
ABSTRACT There is an ever-increasing demand for improved EDA tools to meet technology needs. Because the demand is more vocal on front-end tools, back-end packagi...
Interconnect Design Challenges in Nano CMOS Circuit
Interconnect Design Challenges in Nano CMOS Circuit
In the conventional scaling scheme, interconnect delay cannot be reduced and the global interconnect delay become worse if the length of the wire is not scaled. The conventional ap...
Liquid chromatography/electrospray mass spectrometric analysis of metabolites from an inhibitory RNA duplex
Liquid chromatography/electrospray mass spectrometric analysis of metabolites from an inhibitory RNA duplex
Abstract Liquid chromatography/mass spectrometry (LC/MS) was used as a method for analyzing the metabolites of a model short interfering RNA ...
Environmentally responsive traditional packaging practice: ‘Peni Mula’
Environmentally responsive traditional packaging practice: ‘Peni Mula’
Traditional packaging practices combine cultural heritage with environmental responsibility, offering sustainable solutions to modern packaging challenges. The over-reliance on syn...
Analysis of non‐ideal effects in coupled VLSI interconnects with active and passive load variations
Analysis of non‐ideal effects in coupled VLSI interconnects with active and passive load variations
PurposeThe aim of this paper is to analyze the effects of aggressor‐line load variations (both active gate and passive capacitive loads) on the non‐ideal effects of a coupled VLSI‐...

Back to Top