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Research on Total Ionizing Dose Radiation Hardening by Design Method for Bandgap Reference Based on Real-Time Monitoring and Adaptive Compensation

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Bandgap reference circuits can be affected by bipolar transistor base leakage currents and current gain degradation in Total-dose radiation environments. These factors can cause the output voltage of Bandgap reference to shift, which can make Bandgap reference less reliable. Aiming at the problems of high cost, large layout area, and low universality that traditional total dose hardening methods for Bandgap reference based on process, layout, and device can bring, an on-chip total dose real-time monitoring and adaptive compensation method is proposed to realize circuit-level total dose hardening and improve the radiation resistance of Bandgap references. Based on the 0.18 µm Bipolar-CMOS-DMOS process, specific circuit design, layout design, back-end physical implementation and full engineering based validation of the proposed approach, and the results indicate that with different process angles, the Bandgap reference output dirt increased from 3.4–18.5 mV voltage dirft (100–300 krad) to a maximum of 1 mV dirt (100–300 krad) prior to hardening. This provides a new method for the design of irradiation resistant hardening of Bandgap references at the circuit and system level.
Title: Research on Total Ionizing Dose Radiation Hardening by Design Method for Bandgap Reference Based on Real-Time Monitoring and Adaptive Compensation
Description:
Bandgap reference circuits can be affected by bipolar transistor base leakage currents and current gain degradation in Total-dose radiation environments.
These factors can cause the output voltage of Bandgap reference to shift, which can make Bandgap reference less reliable.
Aiming at the problems of high cost, large layout area, and low universality that traditional total dose hardening methods for Bandgap reference based on process, layout, and device can bring, an on-chip total dose real-time monitoring and adaptive compensation method is proposed to realize circuit-level total dose hardening and improve the radiation resistance of Bandgap references.
Based on the 0.
18 µm Bipolar-CMOS-DMOS process, specific circuit design, layout design, back-end physical implementation and full engineering based validation of the proposed approach, and the results indicate that with different process angles, the Bandgap reference output dirt increased from 3.
4–18.
5 mV voltage dirft (100–300 krad) to a maximum of 1 mV dirt (100–300 krad) prior to hardening.
This provides a new method for the design of irradiation resistant hardening of Bandgap references at the circuit and system level.

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